The present invention relates to a high heat dissipation plastic package for mounting semiconductor elements and a method for making the same. More specifically, the present invention relates to a high heat dissipation plastic package formed by adhesing a substrate for forming a conductor wiring pattern and a heat dissipation plate and a method for making the same.
With the increases in performance and compactness in semiconductor elements in recent years, a variety of high heat dissipation plastic packages of the BGA (BallGridArray) type and the like have been developed. These plastic packages have been developed to handle increased heat generated by semiconductor elements, increased number of terminals used for external connections, easier mounting of semiconductor elements, lower costs, lower impedances, and the like. This type of high heat dissipation plastic package is formed by using an adhesive sheet such as a prepreg sheet to bond a single- or multi-layer heat-resistant resin substrate, formed from a BT resin (a resin having bismaleimide triazine as its main component) or a polyimide resin or the like and equipped with a conductor layer formed by bonding a Cu foil on one or both sides, and a heat dissipation plate formed from a metal plate with high thermal conductivity, e.g., Cu. (For example, see U.S. Pat. No. 5,583,378 and U.S. Pat. No. 5,854,741).
A method for making a conventional high thermal dissipation plastic package 50 will be described, with references to FIG. 11(A)-(D). As shown in FIG. 11(A), a resin substrate 51, which includes a glass cloth to which a Cu foil 52 is bonded, is formed with a hole 53a for a through-hole 53 used to provide conductivity between the front and back surfaces. An electroless Cu plating film is formed on the front and back and side wall surfaces of the hole 53a, and then electricity is passed through this electroless Cu plating to perform electrolytic Cu plating, resulting in a Cu plating film 54. Next, as shown in FIG. 11(B), a dry film is adhesed to this Cu plating film 54. An etching resist pattern is formed using photolithography, where a pattern mask is applied and the pattern is exposed and developed. The Cu plating film and the Cu film 52 at the exposed holes of the etching resist pattern are etched away. The dry film is peeled off to form the wiring pattern 55. Next, as shown in FIG. 11(C), a cavity for mounting a semiconductor element is formed on the resin substrate 51, on which the wiring pattern 55 is formed. This is done by using a router to form a cut-out 56 having an essentially rectangular shape when seen from above.
As shown in FIG. 11(D), the resin substrate 51 and the heat dissipation plate 57, formed from a Cu plate or the like, are interposed by an adhesive sheet 58, e.g., a prepreg sheet, and bonded via pressure and heat to form the high heat discharge plastic package 50. A solder resist film 59 is formed on the upper surface of the resin substrate 51 to expose the necessary sections of the wiring pattern 55.
U.S. Pat. No. 6,376,908 discloses a plastic package for housing a semiconductor chip in which a semiconductor chip is secured to one side of a printed circuit board and sealed with resin. A metal plate having roughly the same size as the printed circuit board is disposed at roughly the center of the midpoint axis of the printed circuit board. Front and back circuit conductors are insulated with a thermosetting resin compound. A section of the metallic inner layer having roughly the same size as the semiconductor chip is exposed to the surface, and the semiconductor chip is secured to the surface of the exposed metal plate. More specifically, a projected metal surface for dissipating heat is exposed on the surface opposite from a projected metal surface for securing the semiconductor chip.
U.S. Pat. No. 6,501,168 discloses a high heat dissipation BGA package with a metal core and a method for making the same. The metal core includes at least one cavity and in it is mounted at least one IC chip. A dielectric layer is secured to a first surface of the metal core to surround the cavity. A chemical method is used to form a conductor layer and dielectric layer to cover the metal core.
In U.S. Pat. No. 5,397,917, an adhesive formed with a reinforcement fiber is applied to a clearance surrounding a through hole and a heat dissipation plate. The adhesive is covered with a substrate layer that includes a conductive trace.
A semiconductor element is housed in a cavity formed in a main surface of an exposed section of the heat dissipation plate and is then sealed with a cover. In this invention, there is no electrical conductivity between the heat dissipation plate and the conductive trace or the conductor pad.
In the conventional high heat dissipation plastic packages and methods for making the same described above, there are the following problems.
(1) Since the heat dissipation plate and the base for forming the conductor wiring pattern are bonded together using an adhesive or adhesive sheet applied later, the overall thickness after bonding will be thicker due to the thickness of the adhesive sheet. This is an obstacle in applications where there is a need for light, thin, compact designs, e.g., in electronic devices such as mobile telephones and personal computers.
(2) If the heat dissipation plate and the base for forming the conductor wiring pattern are bonded together using an adhesive or adhesive sheet applied later, there is an increase in time involved, number of steps, and material costs for precisely applying the adhesive to the resin substrate or the heat dissipation plate or precisely attaching the adhesive sheet. The result is increased production cost for the high heat dissipation plastic package.
(3) When bonding with an adhesive or adhesive sheet, the adhesive resin can bleed into the cavity during bonding, leading to decreased reliability when the semiconductor element is mounted in the cavity.
(4) With conventional high heat dissipation plastic packages disclosed in reference patents, the heat dissipation structure is generally complex, making it difficult to implement for BGA packages, which are relatively simple, as can be done with the present invention.